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AT86RF232
6.1 SPI Timing Description
Pin 17 (CLKM) can be used as a microcontroller master clock source. If the
microcontroller derives the SPI master clock (SCLK) directly from CLKM, the SPI
operates in synchronous mode, otherwise in asynchronous mode.
In asynchronous mode, the maximum SCLK frequency f async is limited to 7.5MHz. The
signal at pin 17 (CLKM) is not required to derive SCLK and may be disabled to reduce
power consumption and spurious emissions.
Figure 6-2 and Figure 6-3 illustrate the SPI timing and introduces its parameters. The
corresponding timing parameter definitions t 1 – t 9 are defined in Section 12.4 .
Figure 6-2. SPI Timing, Global Map and Definition of Timing Parameters t 5 , t 6 , t 8 , t 9 .
/SEL
SCLK
t 9
t 8
MOSI
7
6
5
4
3
2
1
0
7
6
5
4
3
2
1
0
t 5
t 6
MISO
Bit 7
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit 7
Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Figure 6-3. SPI Timing, Detailed Drawing of Timing Parameters t 1 to t 4 .
/SEL
SCLK
t 3
t 4
MOSI
MISO
t 1
Bit 7
Bit 7
t 2
Bit 6
Bit 6
Bit 5
Bit 5
The SPI is based on a byte-oriented protocol and is always a bidirectional
communication between master and slave. The SPI master starts the transfer by
asserting /SEL = L. Then the master generates eight SPI clock cycles to transfer one
byte to the radio transceiver (via MOSI). At the same time, the slave transmits one byte
to the master (via MISO). When the master wants to receive one byte of data from the
slave it must also transmit one byte to the slave. All bytes are transferred with MSB first.
An SPI transaction is finished by releasing /SEL = H.
An SPI register access consists of two bytes, a Frame Buffer or SRAM access of at
least two or more bytes as described in Section 6.2 .
/SEL = L enables the MISO output driver of the Atmel AT86RF232. The MSB of MISO
is valid after t 1 (see Section 12.4 parameter) and is updated at each falling edge of
SCLK. If the driver is disabled, there is no internal pull-up circuitry connected to it.
Driving the appropriate signal level must be ensured by the master device or an
external pull-up resistor.
15
8321A – MCU Wireless – 10/11
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